HP AGILENT E8404A OC 3 12 48 DWDM E1406A J4223A J4233A J4227A VXI MAINFRAME

The HP Agilent E8404A C-size, 13-slot VXI mainframe is the high-performance mainframe in Hewlett-Packard s new VXI mainframe family. It delivers innovative cooling technology, improved backplane design, high reliability, easy maintenance, and versatile accessories. The power supply in the HP E8404A VXI mainframe provides 1000 watts of usable power, sufficient for the most demanding automated test applications. The innovative air distribution system in this mainframe provides extremely quiet and efficient cooling.

This system has the following modules installed:

• E1406A
• J4223A
• J4233A
• J4227A

The E1406A Command Module is a C-size, 1-slot VXI message-based commander that provides Slot 0 and Resource Manager function. It can act as a VMEbus system controller and GPIB (IEEE-488)-to-VXIbus interface device for transparently communicating with any manufacturers message-based VXI modules. The E1406A Command Module has FLASH memory for downloadable drivers, so you can program Agilent register-based devices using the high-level SCPI programming language. It also translates SCPI commands for register-based instruments and therefore, makes these VXI devices as easy to program as message-based instruments.

The J4223A DWDM Controller.

The J4233A DWDM Transmitter Module is a register-based C-size double slot VXI module. It has four optical output ports with the a 1310 nm wavelength laser for all optical ports. PRBS patterns at 2.488320 Gb/s: 1.244160 Gb/s, 622.08 Mb/s and 155.52 Mb/s. It can inject errors: B1, B2 or bit, either single or at 1 x 10-7, 1 x 10-8 or 1 x 10-9.

The J4227A DWDM Short Reach Receiver Module is a register-based C-size double slot VXI modules. It has four optical Input ports, each port can receive optical signals with wavelengths between 1200 nm and 1600 nm. It can detect alarms (LOS, OOF, LOF, AIS-L, and MS-AIS), make BER measurements and capture the J0 trace message in a 2.488 Gb/s, 1.244 Gb/s, 622 Mb/s, or 155 Mb/s concatenated signal carrying PRBS payloads. It can detect B1, B2 and Bit errors. These errors can then be presented to you as an error count or as an error ratio. Error counting is inhibited when alarm conditions occur. For example, B1 and B2 error counting is inhibited during a LOS or LOF condition, and Bit Error counting is inhibited during a LOS, LOF or Pattern Sync Loss condition.